1. Field of the Invention
The present invention relates to the design of electronic circuits, and in particular, relates to the design of an output stage in a CMOS integrated circuit.
2. Discussion of Related Art
Short circuit protection is typically provided in an output stage of an integrated circuit to prevent inadvertent short circuit caused by shorting of an output pin, thereby resulting in large currents to flow in the output transistors. If not properly protected, these output transistors can be irreversibly or permanently damaged. Some methods of output short circuit protection are disclosed in Bipolar and MOS Analog Circuit Design, by Alan B. Grebene, pp. 257-260, published by John Wiley and Sons (1984).
FIG. 6a and 6b show two output stages 600 and 650 having short circuit protection schemes of the prior art. As shown in FIG. 6a, a logic signal to be output is provided at the input terminal 601 of an inverter 602, which includes transistors 602a and 602b. The output signal of inverter 602, which is provided at terminal 603, is used to drive a pull-up output transistor 604. Output stage 600 is provided a resistor 610 to sense the output current flowing from the supply voltage V.sub.cc to the output terminal 605. A pull-up transistor 606 is provided at the gate terminal of output transistor 604 to sense the voltage drop across the resistor 610, and to turn off output transistor 604, when the voltage at the gate terminal of transistor 606 is more than a threshold voltage below the supply voltage V.sub.cc. A similar configuration is provided to the pull-down portion of output stage 600. In FIG. 6a, this pull-down configuration is represented by current source 607. The short-circuit protection scheme of output stage 600 is undesirable because both the output voltage swing at terminal 605 and the attainable gain in the output stage 600 are severely degraded.
In FIG. 6b, a logic signal to be output is provided at the input terminal 651 of an inverter 652, which includes transistors 652a and 652b. The output signal of inverter 652, which is provided at terminal 653, is used to drive a pull-up output transistor 654. The output signal of output stage 650 is provided at terminal 655. Output stage 650 is provided, instead of a resistor and a transistor, such as FIG. 6a's resistor 610 and transistor 606, a zener diode 660 to limit the output current by restricting the gate-to-source ("V.sub.GS ") voltage of output transistor 654 to the breakdown voltage of zener diode 660. A similar configuration is provided to the pull-down portion of output stage 650. In FIG. 6b, this pull-down configuration is represented by current source 657. The output protection scheme of output stage 660 is undesirable, because a substantial leakage current is associated with zener diode 660 in certain manufacturer processes. The leakage current affects the value output short circuit current. Furthermore, the current in zener diode 660 under normal operation condition is high.
An example of an output stage of an amplifier using a zener diode to limit the output current is described in the article "A Quad CMOS Single-Supply Op Amp with Rail-to-Rail Output Swing" by D. Monticelli, published in IEEE Journal of Solid-State Circuits, Vol. sc-21, No. 6, December, 1986, pp. 1026-34.
An alternative scheme, which replaces zener diode 660 by a number of serially connected diodes, is also possible. However, under this alternative scheme, the short-circuit current changes with the supply voltage. Further, under this alternative scheme, even though the leakage current of zener diode 660 is avoided, the current through the serially connected diodes remain high under normal operating conditions.